With power consumption now a key design constraint, recent years have seen growing research interest in these networks as an architectural solution for high-speed data transfer. This single-source reference covers some of the most important design techniques.
As the demand rises for low-power, low-voltage A/D converters, so do the quality-control issues in these devices, whose nano-level variables are difficult to control. This work looks at improving power efficiency and enhancing testing and debugging techniques.
This book presents a broad overview of RF MEMS technology, going from the MEMS devices (mainly BAW and Si MEMS resonators), to basic circuits such as oscillators and finally complete systems such as ultra low-power MEMS-based radios.
Written from years of experience with developing memories and low-voltage CMOS circuits, Nanoscale Memory Repair describes yield and reliability issues in terms of mathematics and engineering. Readers will find a detailed explanation of the various yield models and calculations.
This book examines the impact of nanotechnologies on the design of electronic systems. Coverage includes technologies ranging from nanoelectronics to sensing and micro/nanofluidics and encompasses techniques that bridge the gap between engineering and biology.
This book provides an in-depth overview of on-chip instrumentation technologies and ways of adding ‘design for debug’ (DfD) instrumentation to system-on-chip design. As well as focusing on hardware implementations, software and tools are discussed in detail.
This new edition contains state-of-the-art material as well as the essentials. It includes a systematic approach to the design of chopper and auto-zero OpAmps and Instrumentation Amplifiers with input offset voltages of the order of 1uV.
This book addresses power optimization in modern electronic and computer systems. Exploring power optimization opportunities and their exploitation at various levels of abstraction, it is intended for students, researchers, and practitioners alike.
This book examines the impact of register transfer level (RTL) design choices that may result in issues of testability, data synchronization across clock domains, synthesizability, power consumption and routability, that appear later in the product lifecycle.
This book presents new concepts, techniques and promising programming models for designing software for chips with 'many' (hundreds to thousands) processor cores. It serves as a single-source reference to the state-of-the-art in programming many-core chips.
This book examines issues related to the test, diagnosis and fault-tolerance of Network on Chip-based systems. It provides research on the challenges to test, diagnose and tolerate faults in NoC-based systems and includes numerous test strategies.
This book presents the latest approaches to formal verification techniques to seamlessly integrate different formal verification methods within a single logical foundation. It outlines theoretical and practical issues and includes a range of case studies.