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Computer Arithmetic

Algorithms and Hardware Implementations

By Mircea Vlăduţiu

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Computer Arithmetic provides a complete procedure for linking the digital design and arithmetic algorithms domain, based on original formalism and hardware description languages. Readers will find gate-level designs for all matrix/combinatorial arithmetic structures.

Full Description

  • ISBN13: 978-3-6421-8314-0
  • 273 Pages
  • User Level: Science
  • Publication Date: September 14, 2012
  • Available eBook Formats: PDF
  • eBook Price: $109.00
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Full Description
The subject of this book is the analysis and design of digital devices that implement computer arithmetic. The book's presentation of high-level detail, descriptions, formalisms and design principles means that it can support many research activities in this field, with an emphasis on bridging the gap between algorithm optimization and hardware implementation. The author provides a unified view linking the domains of digital design and arithmetic algorithms, based on original formalisms and hardware description languages. A feature of the book is the large number of examples and the implementation details provided. While the author does not avoid high-level details, providing for example gate-level designs for all matrix/combinational arithmetic structures.The book is suitable for researchers and students engaged with hardware design in computer science and engineering.A feature of the book is the large number of examples and the implementation details provided. While the author does not avoid high-level details, providing for example gate-level designs for all matrix/combinational arithmetic structures.The book is suitable for researchers and students engaged with hardware design in computer science and engineering.
Table of Contents

Table of Contents

  1. The representation of numbers in computing systems.
  2. Functional analysis and synthesis of binary and decimal adding and substracting devices.
  3. Functional analysis and synthesis of binary multiplication devices.
  4. Functional analysis and synthesis of binary division devices.
  5. Functional analysis and synthesis of floating point arithmetic devices.
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