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Compilation Techniques for Reconfigurable Architectures

By João M.P. Cardoso , Pedro C. Diniz

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An introduction to hardware compilation and reconfigurable computing architectures, this book presents a variety of compiler code transformations and mapping techniques focusing on imperative programming languages.

Full Description

  • ISBN13: 978-0-3870-9670-4
  • 235 Pages
  • User Level: Science
  • Publication Date: April 2, 2011
  • Available eBook Formats: PDF
  • eBook Price: $129.00
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Full Description
This book describes a wide range of code transformations and mapping techniques for compiling programs written in high-level programming languages to reconfigurable architectures. While many of these transformations and mapping techniques have been developed in the context of compilation for traditional architectures and high-level synthesis, their application to reconfigurable architectures poses a whole new set of challenges – particularly when targeting fine-grained reconfigurable architectures such as contemporary Field-Programmable Gate-Arrays (FPGAs). Organized in eight chapters, 'Compilation Techniques for Reconfigurable Architectures' provides a helpful structure for practitioners and graduate students in the area of computer science and electrical and computer engineering to effectively map computations to reconfigurable architectures.
Table of Contents

Table of Contents

  1. Introduction.
  2. Overview of Reconfigurable Architectures.
  3. Compilation and Synthesis Flows.
  4. Code Transformations.
  5. Mapping and Execution Optimizations.
  6. Compilers for Reconfigurable Architectures.
  7. Perspectives on Programming Reconfigurable Computing Platforms.
  8. Final Remarks.
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