Integrated Circuits and Systems

Nanoscale Memory Repair

Authors: Horiguchi, Masashi, Itoh, Kiyoo

  • Presents the first comprehensive reference to reliability and repair techniques for nano-scale memories
  • Covers both the mathematical foundations and engineering applications of yield and reliability in nano-scale memories
  • Includes a variety of practical circuits and logic, critical for higher yield and reliability, which have been proven successful during the authors’ extensive experience in developing memories and low-voltage CMOS circuits
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  • ISBN 978-1-4419-7958-2
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Hardcover $179.00
price for USA
  • ISBN 978-1-4419-7957-5
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Softcover $179.00
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  • ISBN 978-1-4614-2794-0
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About this book

Yield and reliability of memories have degraded with device and voltage scaling in the nano-scale era, due to ever-increasing hard/soft errors and device parameter variations. As a result, repair techniques have been indispensable for nano-scale memories. Without these techniques, even modern MPUs/ SoCs, in which memories have dominated the area and performance, could not have been designed successfully.

This book systematically describes these yield and reliability issues in terms of mathematics and engineering, as well as an array of repair techniques, based on the authors’ long careers in developing memories and low-voltage CMOS circuits. Nanoscale Memory Repair gives a detailed explanation of the various yield models and calculations, as well as various, practical logic and circuits that are critical for higher yield and reliability. 

  • Presents the first comprehensive reference to reliability and repair techniques for nano-scale memories;
  • Covers both the mathematical foundations and engineering applications of yield and reliability in nano-scale memories;
  • Includes a variety of practical circuits and logic, critical for higher yield and reliability, which have been proven successful during the authors’ extensive experience in developing memories and low-voltage CMOS circuits.
     
     


Table of contents (6 chapters)

  • An Introduction to Repair Techniques

    Horiguchi, Masashi (et al.)

    Pages 1-17

  • Redundancy

    Horiguchi, Masashi (et al.)

    Pages 19-67

  • Error Checking and Correction (ECC)

    Horiguchi, Masashi (et al.)

    Pages 69-137

  • Combination of Redundancy and Error Correction

    Horiguchi, Masashi (et al.)

    Pages 139-155

  • Reduction Techniques for Margin Errors of Nanoscale Memories

    Horiguchi, Masashi (et al.)

    Pages 157-201

Buy this book

eBook $139.00
price for USA
  • ISBN 978-1-4419-7958-2
  • Digitally watermarked, DRM-free
  • Included format: EPUB, PDF
  • ebooks can be used on all reading devices
  • Download immediately after purchase
Hardcover $179.00
price for USA
  • ISBN 978-1-4419-7957-5
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Softcover $179.00
price for USA
  • ISBN 978-1-4614-2794-0
  • Free shipping for individuals worldwide
  • Usually dispatched within 3 to 5 business days.
Rent the ebook  
  • Rental duration: 1 or 6 month
  • low-cost access
  • online reader with highlighting and note-making option
  • can be used across all devices
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Bibliographic Information

Bibliographic Information
Book Title
Nanoscale Memory Repair
Authors
Series Title
Integrated Circuits and Systems
Copyright
2011
Publisher
Springer-Verlag New York
Copyright Holder
Springer Science+Business Media, LLC
eBook ISBN
978-1-4419-7958-2
DOI
10.1007/978-1-4419-7958-2
Hardcover ISBN
978-1-4419-7957-5
Softcover ISBN
978-1-4614-2794-0
Series ISSN
1558-9412
Edition Number
1
Number of Pages
X, 218
Topics